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ADTF Substream Watchdog
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The Substream Watchdog is configured via a JSON configuration file that is specified in its config_file property.
This file contains three main sections:
The first section specifies the input signals that are used for monitoring certain conditions. These are defined via elements in the signals list element that contain the following attributes:
name (required): An identifier that can be used to reference the input signal in expressions. This is also the name that is used for the output substream that contains the value of this signal.substream (required): Specifies the substream that provides the data of the signal.timeout (required): A timeout after which the signal will be reset to the default value. Supported units are: h, m, s, ms, us and nselement (optional):default attribute is required to be set as well.timeout or not. Keep in mind that you need to connect a timer runner to the check_timeouts runner port that will trigger the reevaluation of the timeout conditions independently of the input triggers.default (optional): Defines the value that is reported when the signal was not updated within timeout. Supported values are integers, floats, booleans, ‘'undefined’,'NaN','Infinity'and'-Infinity'`The second element defines expressions that are evaluated whenever the state/value of one of its referenced signals or referenced expressions changes. These are defined via elements in the expressions list element that contain the following attributes:
name (required): The name of the expression that can be used to reference its result (in other expressions). This is also used as the name of the output substream providing the result of the expression in case that output_type is specified.value (required): The expression itself, please see Expression Syntax for a detailed description.output_type (optional): When specified, then the result of the expression is also published via an output substream. Supported types are bool, uint64, int64, double and tristate.Test cases allow you to define a series of phases to check for complex test scenarios. These are defined via elements in the test_cases list element that contain the following attributes:
name (required): The name of the test case. The state will be published via a substream with this name.phases (required): A list of phases where each element contains the following attributes:condition (required): This expression models the environmental conditions which must be fulfilled for the test to be decidable.acceptance (optional): This expression models the functionality or behavior under test. Default is true, meaning that the phase does not verify any behavior yet.The basic check that is performed is, whether condition -> acceptance (material conditional) holds true for the entire input sequence.
By using multiple phases, both required input sequences and sequences of expected behavior can be modeled.
The transition from one phase to the next happens when condition && acceptance of the current phase is fulfilled. A test case is considered as being completed successfully when this check is also passed for its final phase.
A phase is considered as failed when condition && !acceptance is fulfilled. A failure in any phase counts as a failure for the whole test case. Keep in mind that a test case can both fail and succeed eventually within a single input sequence, see Test Case Results.
The conditions of adjacent phases must be fulfilled in contiguous time intervals. E.g. a transition from speed <= 50 to speed > 50 between two phases is possible but a transition from speed <= 50 to speed > 100 will fail to match because there will be a point of time in between where neither condition is fulfilled. Conditions may overlap / be fulfillable at the same time, but this results in non-deterministic evaluation.
The modeled sequence is continuously checked for all possible matches in the input sequence. There is no risk of missing a match only because another partial match is still being evaluated, in this case both (all) possible matches keep being tracked.
Keep in mind that designing these test cases requires trade offs between having few matches, too many false positives or too many false negatives. You need to know which types of errors your test case permits, to decide whether failures or successes are significant.
The result type transmitted via the corresponding substream contains two elements:
failure: This tells whether one of the phases has failed at least once.success: This tells whether the last phase has succeeded at least once.You can control one ore more recorders with the help of the recorders section in the configuration file. The Substream Watchdog filter will create an interface binding client pin for each recorder listed. You can both control the state of the recorder and add markers based on expressions and test cases.
true:false:undefined: This implies that currently a decision cannot be made, but may yield a result later on.1.2, -1.3e+3, 1.3E-5123, -4560123, -06540x123, -0x654<=>: logic equal: if one operand is undefined the result is undefined as well.!, not: logic not: if the operand is undefined the result is undefined as well.&&, and: logic AND: if one operand is undefined the result is undefined as well.||, or: logic AND: if one operand is true the result is true even if the other operand is undefined.^^, xor: logic XOR: if one operand is undefined the result is undefined as well.?: boolean signal marker: prefix a signal or expression name with ? to treat it as a logical value in conditions.~, bit_not: binary not&, bit_and: binary and|, bit_or: binary or^, bit_xor: binary XOR=, ==: number equal!=, <>: number not equal<=: number less or equal<: number less>=: number greater or equal>: number greater+: addition-: subtraction*: multiplication/: divisionwas(<logic>, <time>): Yields true when the expression parameter evaluated to true at least once within the given time period going back from "now", otherwise false.wait(<time>): Yields undefined for the given time period starting from when the current phase was entered, afterwards returns true. Typical usage: condition || wait(300ms) means to wait for up to 300 ms for condition to become true, afterwards the whole expression my return false depending on condition. This is mostly used in the acceptance expression of a phase to model delayed system reactions.timeout(<time>): Yields true for the given time period starting from when the current phase was entered, afterwards returns false. Typical usage: condition && timeout(300ms) means that condition may succeed within 300 ms but the expression always returns false afterwards. This is mostly used in the condition expression a phase to limit the maximum duration of a phase.round(<numeric>)ceil(<numeric>)floor(<numeric>)bit(<numeric>, <numeric>): Selects the given bit from the second parameter.is_nan(<numeric>): returns whether the parameter is a floating point NaN or not.